Closed ycyang0508 closed 5 years ago
Ya-Chau - great job. You should probably keep looking into Chipsalliance.org, to see notifications about working groups. There will be a group on RISC-V cores, and also workgroup on tools, creating more opportunities for collaboration and work.
I am closing this Issue - as there is no issue, but just wanted to let you know it is very interesting.
All, Because the current test bench is too simple for me to learn the sweRV, thus I use FreeRTOS as the target to learn how to control this great design. With small modification of original test bench, the simple demo from FreeRTOS can be tested using RTL simulation. It's a good start for me and hope it can also help others to get more familiar with sweRV.
github path: https://github.com/ycyang0508/FreeRTOS_on_SweRV Ya-Chau