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chipsalliance / Cores-VeeR-EH2

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RISCV compliance test suit partly fails #34

Closed Don-Haugaard closed 2 years ago

Don-Haugaard commented 2 years ago

Hi,

I am currently trying to run the RISCV compliance tests in https://github.com/riscv/riscv-compliance on the EH2 core using a tool named Riscof (https://github.com/riscv-software-src/riscof). When applying the full ISA I find that some tests are failing:

image

In chapter 18 in revision 1.4 of the EH2 Programmer's Reference Manual a list of expected failing compliance test suites (from the above repository) is given. The same discussion seems to be had in https://github.com/chipsalliance/Cores-SweRV/issues/33 for EH1.

The links in the reference manual seems to be outdated, but the test names suggest that it is the same group of tests that are failing. Section "18.3 I-FENCE.I-01 and fence_i" may reference the same test as "/root/work/eh2/riscv-arch-test/riscv-test-suite/rv32i_m/Zifencei/src/Fencei.S". Likewise does section "18.1 I-MISALIGN_LDST-01" and "18.2 I-MISALIGN_JMP-01" seem to be included in the group of failing tests named "/root/work/eh2/riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/misalign-(...)".

Are these test cases in fact expected to fail?

Thanks and Happy new year! :)

Regards Don-Haugaard

aprnath commented 2 years ago

Hi Don-Haugaard,

My apologies for the very tardy response.. this seems to have gotten buried in the post new-year email storm.

Yes these tests will fail. EH2 natively supports unaligned load/stores to internal and external memories (other than those external memory regions marked as IO/side-effect).

Regards Ajay