This PR fixes incorrect operation of axi4_to_ahb converter module where rvalid and bvalid depend on rready and bready respectively which is forbidden by the spec.
Microarchitectural tests are updated to exercise correct AXI channel handshaking. A VeeR configuration with AHB bus where the axi4_to_ahb module is used is added to CI regression tests.
This PR fixes incorrect operation of
axi4_to_ahb
converter module wherervalid
andbvalid
depend onrready
andbready
respectively which is forbidden by the spec.Microarchitectural tests are updated to exercise correct AXI channel handshaking. A VeeR configuration with AHB bus where the
axi4_to_ahb
module is used is added to CI regression tests.