Closed mkurc-ant closed 7 months ago
Links to coverage and verification reports for this PR (#142) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/
Links to coverage and verification reports for this PR (#142) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/
Links to coverage and verification reports for this PR (#142) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/
This PR adds pre-generated RISCV-DV test programs as a fallback in case of a failure during running their generation with proprietary tools in CI. The reasoning behind is that the programs are random therefore equally good no matter how many times re-generated.