chipsalliance / Cores-VeeR-EL2

VeeR EL2 Core
https://chipsalliance.github.io/Cores-VeeR-EL2/html/
Apache License 2.0
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Error: unrecognized opcode csrw #41

Closed kuoyaoming93 closed 2 years ago

kuoyaoming93 commented 2 years ago

Hi all,

I am trying to install the RISC-V GNU toolchain from source in order to test this core.

I followed the guidelines to install the toolchain (2022.03.25 version), opting for the multilib option.

# Clone the repository
git clone https://github.com/riscv/riscv-gnu-toolchain --recursive
cd riscv-gnu-toolchain/

# Checkout 2022.03.25 version
git checkout 2022.03.25

# Configure as multilib and make
./configure --prefix=/opt/riscv --enable-multilib
make

After that, when I execute the following command to see the supported archs:

riscv64-unknown-elf-gcc --print-multi-lib

.;
rv32i/ilp32;@march=rv32i@mabi=ilp32
rv32im/ilp32;@march=rv32im@mabi=ilp32
rv32iac/ilp32;@march=rv32iac@mabi=ilp32
rv32imac/ilp32;@march=rv32imac@mabi=ilp32
rv32imafc/ilp32f;@march=rv32imafc@mabi=ilp32f
rv64imac/lp64;@march=rv64imac@mabi=lp64

Then, I cloned the SweRV-EL2 RISC-V core, and try to run the hello_world simulation, the following error appeared when I build hello_world.o:

Captura de pantalla de 2022-04-11 16-22-17

Did I forget something in the configuration stage?

Thank you in advance!

kuoyaoming93 commented 2 years ago

I asked the same question in riscv-collab/riscv-gnu-toolchain#1053. It seems that it is related to RISC-V spec version. In the new ISA spec, the csr instructions are part of the zicsr extension.

It should change from -march=rv32imac to -march=rv32imac_zicsr in the Makefile for the latest toolchain versions.

Captura de pantalla de 2022-04-11 17-21-26

Solutions:

  1. Use a version of riscv-gnu-toolchain from before this change was made. (I don't know what version is exactly).
  2. Analyze the toolchain version, and use -march=rv32imac or -march=rv32imac_zicsr depending on the version.
  3. Declare -march=rv32imac_zicsr in independent .mki files.