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chipsalliance / UHDM-integration-tests

Apache License 2.0
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Earlgrey: sw_test_status_if doesn't work in Verilator #463

Closed RRozak closed 3 years ago

RRozak commented 3 years ago

It doesn't throw errors, but the simulation hangs in infinite loop. I created the test: https://github.com/chipsalliance/UHDM-integration-tests/pull/462 It doesn't throw neither errors nor warnings.

RRozak commented 3 years ago

The problems can be reproduced by these tests: https://github.com/chipsalliance/UHDM-integration-tests/pull/464 Some instructions are omitted by Surelog

RRozak commented 3 years ago

Blocked by https://github.com/chipsalliance/Surelog/issues/1872

RRozak commented 3 years ago

There is still no always node. I created the test: https://github.com/chipsalliance/UHDM-integration-tests/pull/471 And the issue: https://github.com/chipsalliance/Surelog/issues/1894

RRozak commented 3 years ago

Removed from the list in https://github.com/antmicro/verilator/pull/496