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chipsalliance / UHDM-integration-tests

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Earlgrey: newest lc_ctrl_fsm doesn't work in Verilator #504

Open rkapuscik opened 3 years ago

rkapuscik commented 3 years ago

After updating Opentitan to newest version, lc_crtl_fsm.sv is failing with:

%Error: Could not get lowconn handle for port, aborting %Error: Internal Error: ../V3Ast.cpp:346: Null item passed to setOp1p

Looks like there is some new dependency that we're missing. This file also needs lc_ctrl_pkg.sv (see #495).

rkapuscik commented 3 years ago

After adding missing dependencies this module now fails with

%Warning-IMPLICIT: /media/hdd/uhdm/uhdm-integration/verilator/uhdm-integration/../uhdm-tests/opentitan/module_tests//..//opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_fsm.sv:443:31: Signal definition not found, creating implicitly: 'LcStScrap'
                   ... For warning description see https://verilator.org/warn/IMPLICIT?v=4.213
                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.
%Warning-IMPLICIT: /media/hdd/uhdm/uhdm-integration/verilator/uhdm-integration/../uhdm-tests/opentitan/module_tests//..//opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_fsm.sv:456:31: Signal definition not found, creating implicitly: 'LcCnt24'
%Error: /media/hdd/uhdm/uhdm-integration/verilator/uhdm-integration/../uhdm-tests/opentitan/module_tests//..//opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_fsm.sv:443:31: Expecting expression to be constant, but variable isn't const: 'LcStScrap'
                                                                                                                                                                                                                            : ... In instance lc_ctrl_fsm.u_state_regs
%Error: /media/hdd/uhdm/uhdm-integration/verilator/uhdm-integration/../uhdm-tests/opentitan/module_tests//..//opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_prim_abstract_flop_0/prim_flop.sv:45:5: Can't convert defparam value to constant: Param 'ResetValue' of 'u_impl_generic'
                                                                                                                                                                                                                          : ... In instance lc_ctrl_fsm.u_state_regs
%Error: /media/hdd/uhdm/uhdm-integration/verilator/uhdm-integration/../uhdm-tests/opentitan/module_tests//..//opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_fsm.sv:456:31: Expecting expression to be constant, but variable isn't const: 'LcCnt24'
                                                                                                                                                                                                                            : ... In instance lc_ctrl_fsm.u_cnt_regs
%Warning-WIDTH: /media/hdd/uhdm/uhdm-integration/verilator/uhdm-integration/../uhdm-tests/opentitan/module_tests//..//opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_prim_generic_flop_0/rtl/prim_generic_flop.sv:9:31: Operator VAR 'ResetValue' expects 320 bits on the Initial value, but Initial value's CONST '?1?h0' generates 1 bits.
                                                                                                                                                                                                                                             : ... In instance lc_ctrl_fsm.u_state_regs.gen_generic.u_impl_generic
%Warning-WIDTH: /media/hdd/uhdm/uhdm-integration/verilator/uhdm-integration/../uhdm-tests/opentitan/module_tests//..//opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_prim_generic_flop_0/rtl/prim_generic_flop.sv:9:31: Operator VAR 'ResetValue' expects 384 bits on the Initial value, but Initial value's CONST '?1?h0' generates 1 bits.
                                                                                                                                                                                                                                             : ... In instance lc_ctrl_fsm.u_cnt_regs.gen_generic.u_impl_generic
%Error: Exiting due to 3 error(s), 4 warning(s)

Core failure here is the %Warning-IMPLICIT and can be replicated with https://github.com/chipsalliance/UHDM-integration-tests/pull/526.