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chipsalliance / UHDM-integration-tests

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Add test of flash_phy module #583

Closed RRozak closed 2 years ago

RRozak commented 3 years ago

It gives 2 warnings

%Warning-WIDTH: /home/rrozak/Documents/verilator/uhdm-integration/../uhdm-tests/opentitan/opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_prim_gf_mult_0/rtl/prim_gf_mult.sv:105:29: Operator LT expects 32 or 2 bits on the LHS, but LHS's VARREF 'cnt' generates 1 bits.

%Warning-WIDTH: /home/rrozak/Documents/verilator/uhdm-integration/../uhdm-tests/opentitan/opentitan-current/build/lowrisc_dv_chip_verilator_sim_0.1/src/lowrisc_prim_gf_mult_0/rtl/prim_gf_mult.sv:97:20: Operator EQ expects 32 or 2 bits on the LHS, but LHS's VARREF 'cnt' generates 1 bits.
RRozak commented 2 years ago

It is passed now.