chipsalliance / UHDM

Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
Apache License 2.0
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Sort capnp factories, ref_typespec, and naming consistency #1020

Closed hs-apotell closed 1 year ago

hs-apotell commented 1 year ago

Sort capnp factories, ref_typespec, and naming consistency

alaindargelas commented 1 year ago

@hs-apotell can this be merged before https://github.com/chipsalliance/UHDM/pull/1018 which is a work in progress?

hs-apotell commented 1 year ago

@hs-apotell can this be merged before #1018 which is a work in progress?

Yes, that's the intent with this PR. It helps with verifying the changes by comparing the DBs using uhdm-cmp. The databases have to have at least the same models (and order) and this change does that.