Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
https://github.com/conda-forge/uhdm-feedstock/blob/main/recipe/fix_cmake.diff https://github.com/conda-forge/uhdm-feedstock/blob/main/recipe/multiple_python.diff https://github.com/conda-forge/uhdm-feedstock/blob/main/recipe/no_link_libpython.diff