Help on the SWERV-ISS interrupt example

[cstaravinda]

Hi All,

This is Aravinda from CircuitSutra Technologies, India.

Need help in understanding the 'interrupt' feature of the SweRV-ISS. Can some one please point me to an example or a suitable documentation for creating a basic Swerv-ISS setup to generate an interrupt and catch the same in interrupt service routine (ISR).

Regards, Aravinda

[jrahmeh]

If you run with --alarm n (for example --alarm 100), then you will get a timer interrupt every n instructions. Here's code that will print an error message whenever a timer interrupt happens:

include

attribute((section(".text.isr"))) attribute((interrupt)) void interruptHandler() { printf("interrupt\n"); }

void enableTimerInterrupt() { unsigned val = 0; asm volatile ("csrr t0, mie"); asm volatile ("ori t0, t0, 0x80"); asm volatile ("csrw mie, t0"); asm volatile ("csrr t0, mstatus"); asm volatile ("ori t0, t0, 0x8"); asm volatile ("csrw mstatus, t0"); }

int main() { enableTimerInterrupt(); while (1) ; }

Save code in a file (say timer.c), save the following in file timer.ld:

OUTPUT_ARCH( "riscv" ) ENTRY(_start)

SECTIONS { . = 0x0; .text.isr . : { (.text.isr) } . : { (.text) } .bss : { (.bss) } . = 0x20000000; . = ALIGN(0x1000); __global_pointer$ = .; .data . : { (.data) (.rodata*) } _edata = .; _end = .; }

Compile as follows: riscv64-unknown-elf-gcc -mabi=ilp32 -march=rv32imc -static -o timer timer.c -T timer.ld

Run as follows: whisper --verbose --isa imcafd --alarm 2000 timer

[cstaravinda]

Hi Jrahmeh,

Many thanks for the quick response.

I could get the example working with few changes (possibly due to text interpretation by the browser). I am providing the updated code below for other's reference:

---- timer.c ----

include

attribute ((section(".text.isr"))) attribute ((interrupt))

void interruptHandler() { printf("interrupt\n"); }

void enableTimerInterrupt() { unsigned val = 0; asm volatile ("csrr t0, mie"); asm volatile ("ori t0, t0, 0x80"); asm volatile ("csrw mie, t0"); asm volatile ("csrr t0, mstatus"); asm volatile ("ori t0, t0, 0x8"); asm volatile ("csrw mstatus, t0"); }

int main() { enableTimerInterrupt(); while (1) ; }

----- timer.ld -----

OUTPUT_ARCH( "riscv" ) ENTRY(_start)

SECTIONS { . = 0x0; .text.isr . : { (.text.isr) } . : { (.text) } .bss : { (.bss) } . = 0x20000000; . = ALIGN(0x1000); __global_pointer$ = .; .data . : { (.data) *(.rodata) } _edata = .; _end = .; }

[luffydream]

Hi, Jrahmeh & cstaravinda; This is Liangju.Li from Metax Technologies, China. We are a startup company in AI and HPC.

Now, we try to import SweRV into our AI soc chip. I want to introduce SWERV-ISS into our cmodel. So, I want to understand the soft interrupt and clint feature. I have try this example about timer alarm，it works fine.

So, could you please point me to an example or documentation about how to generate a soft interrupt/clint and related ISR.

Best Regards, liangju