Compilation failed for EH1 with Verilator

chipsalliance / VeeRwolf

FuseSoC-based SoC for VeeR EH1 and EL2

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Compilation failed for EH1 with Verilator #11

Closed tunghoang290780 closed 4 years ago

tunghoang290780 commented 4 years ago

Hi @olofk

I test Cores-SweRVolf (EH1) using command "fusesoc run --target=sim swervolf" Fusesoc version: 1.11.dev35+gd648377 Verilator version: 4.020 (also try with 4.030) OS version Red Hat Enterprise Linux The compilation is failed due to undefined SV macros (see screenshot). Could you consider this issue

Thanks

tunghoang290780 commented 4 years ago

I found the issue, I use the latest EH1 v1.6 which has not been added into fusesoc. Rolling back v1.5, it works well