chipsalliance / VeeRwolf

FuseSoC-based SoC for VeeR EH1 and EL2
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Incompatible modport connection in axi_node_wrap_with_slives #5

Closed dawidzim closed 4 years ago

dawidzim commented 4 years ago

Hey! In module axi_node_wrap_with_slices is incompatible modport connection, problem is here:

module axi_node_wrap_with_slices  #(
(...))(
(...)
    AXI_BUS.Slave    slave  [NB_SLAVE-1:0], 
    AXI_BUS.Master   master [NB_MASTER-1:0],
(...)
);

and then:

       axi_multicut #(
            .ADDR_WIDTH ( AXI_ADDR_WIDTH     ),
            .DATA_WIDTH ( AXI_DATA_WIDTH     ),
            .USER_WIDTH ( AXI_USER_WIDTH     ),
            .ID_WIDTH   ( AXI_ID_OUT         ),
            .NUM_CUTS   ( MASTER_SLICE_DEPTH )
        ) i_axi_slice_wrap_master (
            .clk_i      ( clk           ),
            .rst_ni     ( rst_n         ),
            .in         ( axi_master[i] ), // from the node
            **.out        ( master[i]     )  // to IO ports**
        );

but port out is:

module axi_multicut #(
(...)
)(
(...)
  AXI_BUS.out out
);

So this connection is incompatible

dawidzim commented 4 years ago

I created pull request to fix this issue: pull req I believe this is a correct repo

olofk commented 4 years ago

Should be fixed now. Otherwise, please reopen