chipsalliance / VeeRwolf

FuseSoC-based SoC for VeeR EH1 and EL2
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Read access stops when read/write access is repeated #59

Open yafuru0 opened 1 year ago

yafuru0 commented 1 year ago

Read access stops when read/write access is repeated. Run the following program.


.text
.align 4

.global acctest

// //I===================================================== //I Access test for chattering access problem //I===================================================== //I void acctest(unsigned int adr, unsigned int in); acctest: csrrsi a2, mstatus, 0x08 lw a3, 0(a0) sw a3, 0(a1) csrrw zero, mstatus, a2 jalr zero, ra, 0 / ret */

.end

Read accesses stop, but write accesses continue. I am running a simulation in VCS.

olofk commented 1 year ago

I don't have access to vcs, but running in Verilator I see continuous activity on both writes and reads.

Do you get the same behavior if you initialize the a0, a1 and a2 before the test? In your code they are uninitialized and could contain any value. I wonder if this might lead to x propagation in your simulation

yafuru0 commented 1 year ago

The memory being accessed is the memory installed in the LSU (AXI Bus). These memories are cleared to 0 at initialization. So x is not propagating. a0, a1, and a3 are initialized during initialization.

ICCM/DCCM are similarly cleared to 0. (i don't use it)

After repeating read/write more than 100 times (?),A problem will occur.

Perhaps, there is a possibility that an interrupt has occurred, so the operation may become strange at that timing.