chipsalliance / VeeRwolf

FuseSoC-based SoC for VeeR EH1 and EL2
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Add target for an Intel Agilex 5 premium devkit. #73

Closed Gostas closed 1 month ago

Gostas commented 1 month ago

We have added support for the Intel Agilex 5 FPGA E-Series DK A5E065BB32AES1 Premium devkit. Please note that we have updated the dependencies with wb_intercon v1.4.1 and updated the relevant connections in the veerwolf_core.v RTL file.

We have tested that it compiles with Quartus Prime Pro 24.2 and that it runs on the hardware.

olofk commented 1 month ago

This looks great! I have been hoping to see VeeRwolf running on Altera devices for a long time. Thank you for your contributions. Picked and pushed!