Closed nij-intel closed 1 year ago
use this document to update the examples with correct buffer size
https://github.com/chipsalliance/aib-protocols/blob/main/axi4-st/doc/axi4_latency_rx_buffer_sizing_guide.pdf
Updated RX FIFO size based on axi4_latency_rx_buffer_sizing_guide.
use this document to update the examples with correct buffer size
https://github.com/chipsalliance/aib-protocols/blob/main/axi4-st/doc/axi4_latency_rx_buffer_sizing_guide.pdf