Closed nij-intel closed 1 year ago
Last checkin for issue 95 did not update ca_align_mux.v correctly
https://github.com/chipsalliance/aib-protocols/blob/main/ca/rtl/ca_rx_align.sv#L362
reset should be connected to rst_com_n
saravi1x reports "Issue #96 “update_ca_align_mux.v” is fixed."
Last checkin for issue 95 did not update ca_align_mux.v correctly
https://github.com/chipsalliance/aib-protocols/blob/main/ca/rtl/ca_rx_align.sv#L362
reset should be connected to rst_com_n