Timing Diagram of Internal Noise Req ports

[Llin-123]

Do we have timing diagram for the signals: eTRNG_REQ, iTRNG_DATA and iTRNG_VALID

[bharatpillilli]

Figure 14 & 15 show the timing diagrams facing external SOC; tagging @howardtr incase you are looking for different information

eTRNG is a much straight forward implementation -> https://github.com/chipsalliance/caliptra-rtl/blob/main/docs/CaliptraHardwareSpecification.md#external-trng-req-hw-api