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chipsalliance / dromajo

RISC-V RV64GC emulator designed for RTL co-simulation
Apache License 2.0
210 stars 63 forks source link

Speed up general execution by ~ 20X #65

Closed et-tommythorn closed 1 year ago

et-tommythorn commented 1 year ago

Unless we are tracing or cosimulating, we should run for a long as possible inside riscv_cpu_interp64(). This change speeds up normal execution by a large amount.