The speed up change restores [most of?] the performance of original RISCVEMU by cache the ITLB lookups. This breaks cosim of course which is why we ran without it, but for non-cosim runs it nice to have it back.
The bootram was mistakenly set to 4 KiB (yes, this needs to be configurable)
Adding a warning tracking for loads/stores that go to memory that isn't tracked (eg. MMIO)
The speed up change restores [most of?] the performance of original RISCVEMU by cache the ITLB lookups. This breaks cosim of course which is why we ran without it, but for non-cosim runs it nice to have it back.
The bootram was mistakenly set to 4 KiB (yes, this needs to be configurable)
Adding a warning tracking for loads/stores that go to memory that isn't tracked (eg. MMIO)