Option to disable the V extension

By default the V extension is enabled in dromajo (and reported in the misa register). There doesn't seem to be any runtime option to disable it. In the code I noticed a switch in riscv_cpu.h:

/* Uncomment the next line to DISABLE Vector Simulation "V-extension" */
//#define VLEN 0

However that doesn't help because a few lines later it would be re-enabled because now VLEN is less than ELEN:

#if (VLEN_MAX < VLEN || VLEN < ELEN || !IS_PO2(VLEN))
#undef VLEN
#define VLEN VLEN_DEFAULT
#endif

Defining ELEN to 0 as well also doesn't help as that would cause ELEN to be less than ELEN_MIN:

#if (ELEN < ELEN_MIN || VLEN < ELEN || !IS_PO2(ELEN))
#undef ELEN
#define ELEN ELEN_DEFAULT
#endif

If I patch these all out I am getting some compilation errors:

error: ‘RISCVCPUState’ {aka ‘struct RISCVCPUState’} has no member named ‘most_recently_written_vregs’; did you mean ‘most_recently_written_reg’?
  175 |             if (cpu->most_recently_written_vregs[i]) {
      |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~~
      |                      most_recently_written_reg

I ended up just patching the code inside riscv_cpu.cpp to ask it not report MCPUID_V in misa to avoid divergence from DUT. But I am feeling like this should be something supported without modifying the code.

chipsalliance / dromajo

Option to disable the V extension #70