Closed alanvgreen closed 1 year ago
This design synthesizes without errors using the Vivado toolchain.
@kgugala - Can you get someone to look at this?
@alanvgreen the error is happening because the DNA_PORT
block is not supported in f4pga toolchain. Looks like your LiteX build instantiated the block. This block is used for e.g. resetting the FPGA from within the bitstream, or for reconfiguring the FPGA fabric by the design itself. If you don't need this functionality you can simply remove DNA_PORT
instantiation.
Hi @kgugala! Unfortunately, the litex-boards definition for the vanilla Arty board includes DNA by default, with no way to turn it off: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/digilent_arty.py#L97
I'm thinking that either F4PGA should support DNA, or the Arty target in litex-boards shouldn't enable it by default. What's the right way to go here?
Hi Alan,
We will take a look at how hard it is to add DNA to the toolchain.
I believe that this is now resolved in litex-boards.
I have installed Symbiflow following the instructions at https://f4pga-examples.readthedocs.io/en/latest/getting.html
With the conda environment active, I installed LiteX using the litex_setup.py script as perhttps://github.com/enjoy-digital/litex#quick-start-guide
I then ran
python -m litex_boards.targets.digilent_arty --toolchain symbiflow --build
. I expected to get a working bitstream but instead I got a failure from VPR.The final lines of output were.
There is a
DNA_PORT
cell in the generated VerilogThis issue seems similar to https://github.com/f4pga/f4pga-arch-defs/issues/2123, but looking at the entry for DNA_PORT in cells_xtra.v, all seems well. There was a recent-ish change to how LiteX uses DNA_PORT, (https://github.com/enjoy-digital/litex/issues/1411, b24d744f8ed) though, to my untrained eye, there is nothing suspicious about that change.