chipsalliance / fpga-interchange-schema

https://fpga-interchange-schema.readthedocs.io/
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Expensive wire to node mapping #32

Open acomodi opened 3 years ago

acomodi commented 3 years ago

It is quite expensive, in terms of run-time, to build the Wire --> Node mapping: it takes ~10 seconds for a xc7a35t device, not a huge problem, but it may become one for bigger devices.

The Wire --> Node mapping is useful for lookups, specifically when trying to access all the other wires connected to a particular node for a given wire.

It might make sense to add a nodeIdx field to the wires, but I am unsure on the drawbacks of adding such a field.

gatecat commented 3 years ago

Long term, this might tie into routing graph folding too, there are efficient ways of folding routing graphs that get a fast bidirectional mapping without ever needing to flatten the graph.