chipsalliance / fpga-tool-perf

FPGA tool performance profiling
https://chipsalliance.github.io/fpga-tool-perf
Apache License 2.0
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build(deps): bump third_party/litex_vexriscv_smp from `f766240` to `c2705dc` #507

Open dependabot[bot] opened 1 year ago

dependabot[bot] commented 1 year ago

Bumps third_party/litex_vexriscv_smp from f766240 to c2705dc.

Commits
  • c2705dc targets: enforce csr_data_width to 8. (32 is now the default and would requir...
  • 08aa835 README: update.
  • 6710be8 vexriscv_smp/core: use f-Strings on MultiPort interfaces.
  • fff370d Merge pull request #1 from enjoy-digital/vex_gen
  • 92219fe remove SDCARD_DEBUG
  • 92aae8a add missing file
  • 343a5cd Add netlist for 1,2,4 core with DMA port and 1 core without DMA port
  • e2ee495 vexriscv_smp/core: rename dma_buses to dma_bus and sync with LiteX.
  • fba9a09 targets: apply VexRiscvSMP changes to all targets.
  • 4b45e2a arty: enable coherent DMA, add optional analyzer (--with-analyzer) through UA...
  • Additional commits viewable in compare view


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