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chipsalliance / fpga-tool-perf

FPGA tool performance profiling
https://chipsalliance.github.io/fpga-tool-perf
Apache License 2.0
99 stars 28 forks source link

build(deps): bump third_party/RapidWright from `ccb9c26` to `106bf48` #636

Closed dependabot[bot] closed 9 months ago

dependabot[bot] commented 9 months ago

Bumps third_party/RapidWright from ccb9c26 to 106bf48.

Commits
  • 106bf48 [EDIFNetlist] - Ensure Macro Expansion Deep Copies Children (#828)
  • 95c7a51 Minor RWRoute and UltraScaleClockRouting fixes (#829)
  • fbac35d Properly add/remove dual-output pins (#825)
  • 659e8d1 [TestRouteNode] Update comment; swap east and west (#827)
  • 9fefb21 Add VivadoTools.reportRouteStatus() overload for specific net status (#823)
  • 64961dd Update link to Discussions forum (#824)
  • 1258753 [RWRoute] Only add alternative sources to SiteInst if used (#821)
  • 030b35b RouteNode.getPIPsBackToSource() to recognize reversed PIPs (#822)
  • 366e742 [PhysNetlistReader] Create FFRoutethruCell-s correctly (#817)
  • ad8248c [PhysNetlistWriter] No IO site port output BELPins without SitePinInst (#820)
  • Additional commits viewable in compare view


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dependabot[bot] commented 9 months ago

Superseded by #637.