Allow multiple LUT elements in site type

chipsalliance / python-fpga-interchange

Python interface to FPGA interchange format

ISC License

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Allow multiple LUT elements in site type #145

Closed mkurc-ant closed 2 years ago

mkurc-ant commented 2 years ago

This PR fixes an issue with the testarch generator / device resources builder so that it is now possible to have multiple LUT elements within the same site type.