chipsalliance / python-fpga-interchange

Python interface to FPGA interchange format
ISC License
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[WIP] Importing cell timings from prjxray-db #147

Open mkurc-ant opened 2 years ago

mkurc-ant commented 2 years ago

This PR continues the work towards timing driven routing by importing cell timings from prjxray-db to device resources database of a 7-series device.

Cell timings are stored in SDF format in prjxray-db. The patching script reads them using the python-sdf-timing library and populates the data to the device resources structures. Since cell names and instances in those SDF files do not correspond one-to-one with the architecture a manual mapping is needed. For this purpose a JSON file is used which contains the mapping.

The mapping in this PR considers only most common cell types like those inside SLICE. Timings for others are either not mapped or not present in prjxray-db.

The timing importer does not consider routing BEL timings yet.