chipsalliance / riscv-dv

Random instruction generator for RISC-V processor verification
Apache License 2.0
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randomizing mstatus.MIE when priv mode is lower than machine #908

Closed Saad525 closed 1 year ago

Saad525 commented 1 year ago

When its lower privilege mode, mstatus.MIE is not required to be 1 for taking interrupt.

So, randomizing mstatus.MPIE to 0/1 when interrupt is enabled, for lower privilege modes.

@GregAC @ctopal @hcallahan-lowrisc

Issue: https://github.com/lowRISC/ibex/issues/1825

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marnovandermaas commented 1 year ago

@weicaiyang PTAL