chipsalliance / riscv-dv

Random instruction generator for RISC-V processor verification
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[pmp] Ensure MML PMP configurations don't dominate. #913

Closed GregAC closed 1 year ago

GregAC commented 1 year ago

A constraint prevents MML being disabled when region configurations with W == 1 and R == 0 exist (this combination is reserved when MML is disabled). This has the effect of making configurations with MML disabled rare as many random configurations will have at least one region with W == 1 and R == 0.

Add a solve before constraint so MML is decided upon before the W and R are randomized to more evenly generate MML and non-MML configurations.

GregAC commented 1 year ago

@marnovandermaas PTAL

GregAC commented 1 year ago

@weicaiyang PTAL