can't do riscv_csr_test

I used the DV to test my design of RV64IMC, and i worked so good. Now i want to test my machine mode csr register implementation. When i try to run the csr test, this error keeps showing up, what should i do??

juba@virtual-machine:~/tests/csr$ run --test riscv_csr_test | tee "dv.log"
Wed, 28 Feb 2024 09:11:41 INFO     Creating output directory: out_2024-02-28
Wed, 28 Feb 2024 09:11:42 INFO     Processing regression test list : /home/juba/riscv-dv/target/rv32imc/testlist.yaml, test: riscv_csr_test
Wed, 28 Feb 2024 09:11:42 INFO     Processing regression test list : /home/juba/riscv-dv/yaml/base_testlist.yaml, test: riscv_csr_test
Wed, 28 Feb 2024 09:11:42 INFO     Found matched tests: riscv_csr_test, iterations:1
Wed, 28 Feb 2024 09:11:42 INFO     Processing simulator setup file : /home/juba/riscv-dv/yaml/simulator.yaml
Wed, 28 Feb 2024 09:11:42 INFO     Found matching simulator: questa
Wed, 28 Feb 2024 09:11:42 INFO     Running RISC-V instruction generator
Wed, 28 Feb 2024 09:11:42 INFO     Generating 1 riscv_csr_test
Wed, 28 Feb 2024 09:11:42 INFO     Traceback (most recent call last):
  File "/home/juba/riscv-dv/scripts/gen_csr_test.py", line 434, in <module>
    main()
  File "/home/juba/riscv-dv/scripts/gen_csr_test.py", line 428, in main
    gen_csr_instr(get_csr_map(args.csr_file, args.xlen),
  File "/home/juba/riscv-dv/scripts/gen_csr_test.py", line 359, in gen_csr_instr
    predict_csr_val(op,
  File "/home/juba/riscv-dv/scripts/gen_csr_test.py", line 224, in predict_csr_val
    zero = bitarray(uint=0, length=csr_val.len - 5)
  File "/home/juba/.local/lib/python3.10/site-packages/bitstring/bits.py", line 228, in __getattr__
    raise AttributeError(f"'{self.__class__.__name__}' object has no attribute '{attribute}'.")
AttributeError: 'BitArray' object has no attribute 'len'.

Wed, 28 Feb 2024 09:11:42 ERROR    ERROR return code: True/1, cmd:python3 /home/juba/riscv-dv/scripts/gen_csr_test.py --csr_file /home/juba/riscv-dv/yaml/csr_template.yaml --xlen 32 --iterations 1 --out out_2024-02-28/asm_test --end_signature_addr 0

chipsalliance / riscv-dv

can't do riscv_csr_test #972