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chipsalliance / riscv-dv

Random instruction generator for RISC-V processor verification
Apache License 2.0
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Error: illegal operands `sd s11,sub_4_stack_p(s5)' #986

Open il-steffen opened 4 months ago

il-steffen commented 4 months ago

I see this multiple times in other closed bugs like #969, but never a fix.

It seems the selection of get_imm() should be more constrained to fit the respective instruction type. Unfortunately but my SV skills are nowhere good enough for that..