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Rocket Chip Generator
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`mtval` incorrectly set after misaligned jump #1805

Closed debs-sifive closed 5 years ago

debs-sifive commented 5 years ago

Type of issue: bug report

Impact: API modification

Development Phase: request

Other information

If the current behavior is a bug, please provide the steps to reproduce the problem: The misaligned jump test from riscv-compliance fails when run with DefaultRV32Config in verilator.

The debug emulator can be run with 

./emulator-freechips.rocketchip.system-DefaultRV32Config-debug +max-cycles=5000000 +verbose -v output/ma_fetch.vpd.vcd $RISCV_COMPLIANCE/work/rv32si/ma_fetch.elf 3>&1 1>&2 2>&3 | spike-dasm  > output/ma_fetch.out && [ $PIPESTATUS -eq 0 ]

What is the current behavior? After the misaligned jump on L61, mtval is set to zero.

What is the expected behavior? mtval should be set to the faulting instruction's address, according to the privileged spec.

Please tell us about your environment:

What is the use case for changing the behavior? Follows spec and helps with debugging.

debs-sifive commented 5 years ago

Looks like the spec does not actually require that mtval be set to the faulting address in this case.

"When a trap is taken into M-mode, mtval is either set to zero or written with exception-specific information to assist software in handling the trap. Otherwise, mtval is never written by the implementation, though it may be explicitly written by software. The hardware platform will specify which exceptions must set mtval informatively and which may unconditionally set it to zero."