Other information
It would be nice to have a knob that adds test muxes for all RAMS used by the rocket chip and get these signals routed out to the top level. We have implemented this previously ourselves, but after the last rewrite of the rocket tiles it has been very difficult to understand what is going on and how to connect IOs through these levels.
We have a BIST module in verilog that we want to test against the rocket chip RAMs in RTL simulations. This must be valuable for other users of the rocket chip who are in the same position.
I know it is possible to hook things up during synthesis, but it is much more convenient verifying the implementation in an RTL simulation.
Type of issue: other enhancement
Impact: no functional change
Development Phase: request
Other information It would be nice to have a knob that adds test muxes for all RAMS used by the rocket chip and get these signals routed out to the top level. We have implemented this previously ourselves, but after the last rewrite of the rocket tiles it has been very difficult to understand what is going on and how to connect IOs through these levels.
We have a BIST module in verilog that we want to test against the rocket chip RAMs in RTL simulations. This must be valuable for other users of the rocket chip who are in the same position.
I know it is possible to hook things up during synthesis, but it is much more convenient verifying the implementation in an RTL simulation.