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Rocket Chip Generator
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TLBs present even if useVM=false #2812

Open Uzair540 opened 3 years ago

Uzair540 commented 3 years ago

There is a parameter in case class RocketCoreParams that is useVM . When I disable that it should not use TLBs as TLBs are used for translation of virtual address to physical address. However, when I see the generated verilog, it contains TLBs in DCache as well as FrontEnd. Am I missing something?

jerryz123 commented 3 years ago

If !usingVM, the TLBs contains very little logic, and just pass through PPN = VPN.

Uzair540 commented 3 years ago

Can you please elaborate PPN=VPN ?

bg193 commented 3 years ago

If !usingVM, the TLBs contains very little logic, and just pass through PPN = VPN.

When I disable useVM, I see the PTW in the generated verilog. How to disable PTW?

jerryz123 commented 3 years ago

PTW module is still instantiated in that case but most internal logic is removed.