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chipsalliance / rocket-chip

Rocket Chip Generator
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Unable to make verilog #3617

Closed ic-ssc closed 5 months ago

ic-ssc commented 5 months ago

When make the verilog, compilation process will be stuck in "[build. sc] [22/53] mill. Scalalib. ZincWorkerModule. The classpath".

[schu@yznode-big-07 rocket-chip]$ make verilog CONFIG=DefaultSmallConfig cd /Business/EDA_wx_company/schu/rocket-chip && mill emulator[freechips.rocketchip.system.TestHarness,DefaultSmallConfig].mfccompiler.compile [build.sc] [8/53] mandatoryIvyDeps.super.mill.scalalib.JavaModule.mandatoryIvyDe [build.sc] [22/53] mill.scalalib.ZincWorkerModule.classpath

[schu@yznode-big-07 ~]$ java -version openjdk version "1.8.0_262" OpenJDK Runtime Environment (build 1.8.0_262-b10) OpenJDK 64-Bit Server VM (build 25.262-b10, mixed mode)

sequencer commented 5 months ago

The Rocket Chip currently uses nix to configure the build and/or development environment, you need to install it first depending on your OS distro.