Open Krishnakumarmohanraj opened 1 month ago
Same here. It seems like firtool isn't being built properly and I narrowed down the error portion to this specific piece of code in the build.sc file:
object mfccompiler extends Module {
def compile = T {
os.proc("firtool",
generator.chirrtl().path,
s"--annotation-file=${generator.chiselAnno().path}",
"--disable-annotation-unknown",
"-dedup",
"-O=debug",
"--split-verilog",
"--preserve-values=named",
"--output-annotation-file=mfc.anno.json",
s"-o=${T.dest}"
).call(T.dest)
PathRef(T.dest)
}
so what is debup? I have firtool installed and when i run make verilog, the following error occurs:
`No mill version specified.
You should provide a version via '.mill-version' file or --mill-version option.
Using mill version 0.11.11
[189/189] emulator[freechips.rocketchip.system.TestHarness,freechips.rocketchip.system.DefaultConfig].mfccompiler.compile
firtool: Unknown command line argument '-dedup'. Try: 'firtool --help'
firtool: Did you mean '--no-dedup'?
1 targets failed
emulator[freechips.rocketchip.system.TestHarness,freechips.rocketchip.system.DefaultConfig].mfccompiler.compile os.SubprocessException: Result of firtool…: 1
os.proc.call(ProcessOps.scala:95)
millbuild.build$Emulator$mfccompiler$.$anonfun$compile$3(build.sc:151)
make: *** [Makefile:11: verilog] Error 1`
To generate Verilog from rocket-chip, I recommend using Chipyard. The rocket-chip repo is intended to be used as a library by more complex projects.
so what is debup? I have firtool installed and when i run make verilog, the following error occurs:
`No mill version specified. You should provide a version via '.mill-version' file or --mill-version option. Using mill version 0.11.11 [189/189] emulator[freechips.rocketchip.system.TestHarness,freechips.rocketchip.system.DefaultConfig].mfccompiler.compile firtool: Unknown command line argument '-dedup'. Try: 'firtool --help' firtool: Did you mean '--no-dedup'? 1 targets failed emulator[freechips.rocketchip.system.TestHarness,freechips.rocketchip.system.DefaultConfig].mfccompiler.compile os.SubprocessException: Result of firtool…: 1 os.proc.call(ProcessOps.scala:95) millbuild.build$Emulator$mfccompiler$.$anonfun$compile$3(build.sc:151) make: *** [Makefile:11: verilog] Error 1`
@yulong-lan Maybe you can modify build.sc, about line 145 in object mfccompiler, change the parameter "-dedup" to "--no-dedup". I guess it's due to the update of firtool.(and my firtool version is 1.62.0)
Hi Team,
we installed rocket tools and chisel in machine and set the path, when we run the cmd "make verilog" in rocket-chip we are geeting attached error. Can you help me on this issue please![rocket-chip error](https://github.com/user-attachments/assets/ebfc17e8-a5f4-4c32-bf56-894b88f7d497)