Closed dependabot[bot] closed 6 days ago
Tool | New Failures | New Passes | Added | Removed | Not Affected |
---|---|---|---|---|---|
UhdmVerilator | 0 | 0 | 0 | 0 | 4668 |
Yosys | 2 | 1 | 0 | 0 | 4309 |
Slang_parse | 0 | 0 | 0 | 0 | 4590 |
Surelog | 0 | 0 | 0 | 0 | 4653 |
tree_sitter_verilog | 0 | 0 | 0 | 0 | 4499 |
SynligYosys | 0 | 0 | 0 | 0 | 4311 |
circt_verilog | 0 | 0 | 0 | 0 | 4643 |
Slang | 0 | 0 | 0 | 0 | 4653 |
yosys_slang | 0 | 0 | 0 | 0 | 3850 |
moore | 0 | 0 | 0 | 0 | 4590 |
VeribleExtractor | 0 | 0 | 0 | 0 | 4499 |
Icarus | 0 | 0 | 0 | 0 | 4668 |
moore_parse | 0 | 0 | 0 | 0 | 4499 |
Sv2v_zachjs | 0 | 0 | 0 | 0 | 4653 |
Odin | 0 | 0 | 0 | 0 | 4590 |
Verilator | 1 | 0 | 0 | 0 | 4667 |
sv_parser | 0 | 0 | 0 | 0 | 4590 |
tree_sitter_systemverilog | 0 | 0 | 0 | 0 | 4495 |
Verible | 0 | 0 | 0 | 0 | 4499 |
Bumps third_party/cores/ariane from
4619a67
to7eb59c3
.Commits
7eb59c3
iro: remove an unreachable statement (#2588)43edcd4
document issue stage (#2598)6a86ebd
add CVA6ConfigFpgaAltera parameter (#2590)16f37b9
Fix issue when NrPMPEntries=0 (#2589)4f5492d
Add failure checks in report_tandem script (#2597)7ae45e1
use "testelf" branch for the gate simulation (#2595)5bc34d7
Revert "csr_regfile: Fix S-mode traps when H extension is enabled (#2587)" (#...485c382
csr_regfile: Fix S-mode traps when H extension is enabled (#2587)67f185c
Bump verif/core-v-verif from72bd7ca
tof73efc4
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