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chipsalliance / sv-tests

Test suite designed to check compliance with the SystemVerilog standard.
https://chipsalliance.github.io/sv-tests-results/
ISC License
297 stars 75 forks source link

build(deps): bump third_party/tools/odin_ii from `f669015` to `2ce2c6f` #6453

Open dependabot[bot] opened 8 hours ago

dependabot[bot] commented 8 hours ago

Bumps third_party/tools/odin_ii from f669015 to 2ce2c6f.

Commits
  • 2ce2c6f Merge pull request #2776 from ZohairZaidi/quickstart
  • 9d920ec Merge pull request #2808 from AlexandreSinger/feature-ap-testing
  • 4650ba1 [AP] Testing Infrastructure
  • ffdfcd5 Running VPR manually
  • 66f35d9 Merge pull request #2812 from AlexandreSinger/feature-cmake-min-req
  • f9ce38d [CMake] Upgrade Minimum Version to 3.10
  • b9f51e2 reorder layout
  • 3e658aa final
  • 2586a98 Merge pull request #2806 from AlexandreSinger/feature-ap-global-placement
  • fe92b3e [AP] Global Placer
  • Additional commits viewable in compare view


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