chipsalliance / synlig

SystemVerilog synthesis tool
Apache License 2.0
169 stars 23 forks source link

Support and test Mac build and install #1980

Closed timkpaine closed 1 year ago

timkpaine commented 1 year ago

xref: https://github.com/chipsalliance/yosys-f4pga-plugins/pull/485

need to fix https://github.com/chipsalliance/synlig/issues/1961 as well to avoid installing old stuff on Mac build

aWZHY0yQH81uOYvH commented 1 year ago

I'm still running into problems building on macOS. On the current head commit (b746752):

Partial linker output ``` [100%] Linking CXX shared library /opt/synlig/install/share/yosys/plugins/systemverilog.dylib ld: warning: ignoring duplicate libraries: 'third_party/surelog/third_party/UHDM/lib/libuhdm.a' ld: Undefined symbols: Yosys::log_header(Yosys::RTLIL::Design*, char const*, ...), referenced from: systemverilog_plugin::UhdmAstFrontend::call_log_header(Yosys::RTLIL::Design*) in uhdm_ast_frontend.cc.o systemverilog_plugin::UhdmSurelogAstFrontend::call_log_header(Yosys::RTLIL::Design*) in uhdm_surelog_ast_frontend.cc.o systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream>*&, std::__1::basic_string, std::__1::allocator>, std::__1::vector, std::__1::allocator>, std::__1::allocator, std::__1::allocator>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o Yosys::log_signal(Yosys::RTLIL::SigSpec const&, bool), referenced from: systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream>*&, std::__1::basic_string, std::__1::allocator>, std::__1::vector, std::__1::allocator>, std::__1::allocator, std::__1::allocator>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream>*&, std::__1::basic_string, std::__1::allocator>, std::__1::vector, std::__1::allocator>, std::__1::allocator, std::__1::allocator>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream>*&, std::__1::basic_string, std::__1::allocator>, std::__1::vector, std::__1::allocator>, std::__1::allocator, std::__1::allocator>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o systemverilog_plugin::SynligEdifBackend::execute(std::__1::basic_ostream>*&, std::__1::basic_string, std::__1::allocator>, std::__1::vector, std::__1::allocator>, std::__1::allocator, std::__1::allocator>>>, Yosys::RTLIL::Design*) in synlig_edif.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::logv_error(char const*, __va_list_tag*), referenced from: systemverilog_plugin::UhdmAst::report_error(char const*, ...) const in uhdm_ast.cc.o Yosys::log_warning(char const*, ...), referenced from: systemverilog_plugin::UhdmAst::process_object(unsigned int*) in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::process_operation(UHDM::BaseClass const*) in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::process_operation(UHDM::BaseClass const*) in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::process_unsupported_stmt(UHDM::BaseClass const*, bool) in uhdm_ast.cc.o systemverilog_plugin::const2ast(std::__1::basic_string, std::__1::allocator>, char, bool) in synlig_const2ast.cc.o my_strtobin(std::__1::vector>&, char const*, int, int, char, bool) in synlig_const2ast.cc.o ... Yosys::AST_INTERNAL::current_ast, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::AST_INTERNAL::flag_mem2reg, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::AST_INTERNAL::current_block, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o ... Yosys::AST_INTERNAL::current_scope, referenced from: systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o ... Yosys::AST_INTERNAL::flag_autowire, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::AST_INTERNAL::current_always, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o ... Yosys::AST_INTERNAL::flag_nomem2reg, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::AST_INTERNAL::flag_nomeminit, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::AST_INTERNAL::current_ast_mod, referenced from: systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::process_design() in uhdm_ast.cc.o systemverilog_plugin::setup_current_scope(std::__1::unordered_map, std::__1::allocator>, Yosys::AST::AstNode*, std::__1::hash, std::__1::allocator>>, std::__1::equal_to, std::__1::allocator>>, std::__1::allocator, std::__1::allocator> const, Yosys::AST::AstNode*>>>, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::simplify_sv(Yosys::AST::AstNode*, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::UhdmAst::simplify_parameter(Yosys::AST::AstNode*, Yosys::AST::AstNode*) in uhdm_ast.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o ... Yosys::AST_INTERNAL::current_top_block, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::AST_INTERNAL::current_block_child, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o ... Yosys::AST_INTERNAL::current_memwr_count, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o Yosys::AST_INTERNAL::current_memwr_visible, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o ... Yosys::AST_INTERNAL::current_always_clocked, referenced from: systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o systemverilog_plugin::simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) in synlig_simplify.cc.o ... [more...] ```
Linker command (build/CMakeFiles/synlig.dir/link.txt) ``` /Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/c++ -D_YOSYS_ -Wno-unused-parameter -std=c++17 -O3 -DNDEBUG -Wall -Wno-unused-parameter -O3 -DNDEBUG -isysroot /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX14.0.sdk -dynamiclib -Wl,-headerpad_max_install_names -compatibility_version 1.76.0 -o /opt/synlig/install/share/yosys/plugins/systemverilog.1.76.dylib -install_name @rpath/systemverilog.1.76.dylib CMakeFiles/synlig.dir/frontends/systemverilog/compat_symbols.cc.o CMakeFiles/synlig.dir/frontends/systemverilog/uhdm_ast_frontend.cc.o CMakeFiles/synlig.dir/frontends/systemverilog/uhdm_surelog_ast_frontend.cc.o CMakeFiles/synlig.dir/frontends/systemverilog/uhdm_ast.cc.o CMakeFiles/synlig.dir/frontends/systemverilog/uhdm_common_frontend.cc.o CMakeFiles/synlig.dir/third_party/yosys_mod/synlig_const2ast.cc.o CMakeFiles/synlig.dir/third_party/yosys_mod/synlig_edif.cc.o CMakeFiles/synlig.dir/third_party/yosys_mod/synlig_simplify.cc.o third_party/surelog/third_party/UHDM/lib/libuhdm.a third_party/surelog/lib/libsurelog.a third_party/surelog/third_party/UHDM/lib/libuhdm.a third_party/surelog/third_party/UHDM/third_party/capnproto/c++/src/capnp/libcapnp.a third_party/surelog/third_party/UHDM/third_party/capnproto/c++/src/kj/libkj.a third_party/surelog/third_party/antlr4/runtime/Cpp/runtime/libantlr4-runtime.a -Xlinker -framework -Xlinker CoreFoundation /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX14.0.sdk/usr/lib/libz.tbd -ldl -lutil -lm -lpthread ```

Following the same steps under Ubuntu 22.04 and GCC, the build runs successfully.

Edit: see #2133

timkpaine commented 1 year ago

this will work to manually install them, it should also work with uhdm and surelog from homebrew https://github.com/dau-dev/tools

alaindargelas commented 1 year ago

Fixed by: #2133

make -f cmake-makefile