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chipsalliance / synlig

SystemVerilog support for Yosys
Apache License 2.0
159 stars 21 forks source link

Build(deps): Bump third_party/yosys from `ea7818d` to `171577f` #2419

Closed dependabot[bot] closed 3 months ago

dependabot[bot] commented 5 months ago

Bumps third_party/yosys from ea7818d to 171577f.

Commits
  • 171577f Merge pull request #4340 from gadfort/abc-lib-merge
  • 4897e89 Bump version
  • 52c04f3 Merge pull request #4341 from YosysHQ/mmicko/ci_update
  • c38bbd7 Add new verific testing environment CI
  • 40e8f5b Bump version
  • e78c38b Merge pull request #4339 from YosysHQ/mmicko/lib_as_attribute
  • 1527cc8 Merge pull request #4338 from jix/fix-formalff-setundef-srst
  • af94123 verific: expose library name as module attribute
  • 2bd889a formalff -setundef: Fix handling for has_srst FFs
  • 7bb2746 Merge pull request #4334 from YosysHQ/docs_tidy
  • Additional commits viewable in compare view


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dependabot[bot] commented 3 months ago

Superseded by #2440.