chipsalliance / synlig

SystemVerilog support for Yosys
Apache License 2.0
144 stars 20 forks source link

Build(deps): Bump third_party/OpenROAD-flow-scripts from `62325bf` to `34ea927` #2457

Closed dependabot[bot] closed 5 days ago

dependabot[bot] commented 1 week ago

Bumps third_party/OpenROAD-flow-scripts from 62325bf to 34ea927.

Commits
  • 34ea927 Merge pull request #2083 from Pinata-Consulting/makefile-memory-tweak-list-files
  • 072cc6b makefile: improve memory report of used source files
  • f0caba6 Merge pull request #2075 from Pinata-Consulting/memory-lists-source-files-act...
  • 5f3c603 Merge pull request #2074 from Pinata-Consulting/asap7-slightly-improved-python
  • 5b762a7 Merge pull request #2073 from Pinata-Consulting/asap7-fewer-logging-questions
  • 5c3597d Merge pull request #2072 from Pinata-Consulting/designs-inconsistent-logging
  • e34b529 Merge pull request #2071 from Pinata-Consulting/flow-puts-consistent-logging
  • 24cd1aa makefile: The memory report now also lists source files actually used by the ...
  • 460a6ea scripts: Python format mem_dump.py
  • 3337fff Merge pull request #2064 from The-OpenROAD-Project/update-openroad
  • Additional commits viewable in compare view


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github-actions[bot] commented 1 week ago

Logs difference between main branch: https://github.com/chipsalliance/synlig-logs/compare/81b61d202de48413d5f5b53c24b962001330d228..dependabot/submodules/third_party/OpenROAD-flow-scripts-34ea927

dependabot[bot] commented 5 days ago

Superseded by #2462.