chipsalliance / synlig

SystemVerilog synthesis tool
Apache License 2.0
169 stars 22 forks source link

Build(deps): Bump third_party/surelog from `5f6e20e` to `e023cda` #2565

Closed dependabot[bot] closed 2 months ago

dependabot[bot] commented 2 months ago

Bumps third_party/surelog from 5f6e20e to e023cda.

Commits
  • e023cda Merge pull request #3983 from alainmarcel/alainmarcel-patch-1
  • 4ac89ef 32 bit size interface for values and 32 bit storage for string vals used for ...
  • fbbe26e Merge pull request #3982 from alainmarcel/preproc_fix
  • ccf1116 Preprocessor fix for escaped identifiers
  • See full diff in compare view


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github-actions[bot] commented 2 months ago

Logs difference between main branch: https://github.com/chipsalliance/synlig-logs/compare/81b61d202de48413d5f5b53c24b962001330d228..dependabot/submodules/third_party/surelog-e023cda