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chipsalliance / synlig

SystemVerilog synthesis tool
Apache License 2.0
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Run yosys and plugin with address sanitizer #649

Open hzeller opened 2 years ago

hzeller commented 2 years ago

Running the tests with address sanitizer ( clang doc: https://clang.llvm.org/docs/AddressSanitizer.html ; should be similar for gcc/clang) will help finding some issues early.

It does result in somewhat slower binaries (but much less so than e.g. valgrind), so the CI machines will have to work harder, but any findings here will well offset the engineering time attempting to find a head-scratching issue later.

hzeller commented 2 years ago

I think this gets more important as we can find crashes that might not be detected otherwise (like the use-after-delete situation in https://github.com/chipsalliance/yosys-f4pga-plugins/issues/366)

hzeller commented 2 years ago

I don't have permission to assign owners to bugs in this repo, so CC: @rkapuscik @tgorochowik

rkapuscik commented 2 years ago

Related: https://github.com/antmicro/yosys-uhdm-plugin-integration/pull/98

mglb commented 1 year ago

Possible blocker: https://github.com/chipsalliance/Surelog/issues/3661

I had some troubles in making ASAN work due to lack of support for code loaded with dlopen/dlclose, but I was able to use it after all with the help of this workaround: https://github.com/google/sanitizers/issues/89#issuecomment-406316683