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chipsalliance / verible

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
https://chipsalliance.github.io/verible/
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Why is `$random` considered a "forbidden system function or task"? #2221

Open benjamin051000 opened 1 month ago

benjamin051000 commented 1 month ago

invalid-system-task-function states:

Checks that no forbidden system tasks or functions are used. These consist of the following functions: $psprintf, $random, and $dist_*. As well as non-LRM function $srandom. See [Style: forbidden-system-functions].

When I use $random in a SystemVerilog file, Verible prints this warning:

1. $random is a forbidden system function or task, please use $urandom instead [Style: forbidden-system-functions][invalid-system-task-function]

I'm curious as to why it's discouraged to use $random and instead use $urandom. Forgive me, I'm pretty new to verilog & systemverilog. Thanks for the clarification!

hzeller commented 1 month ago

I think that was mostly a request by DV engineers that like to inject better ways to get test vector, though it would probably good to have that as an explicit style guide somewhere so that it is easy to refer to.

Maybe @fangism remembers the details ?

snsokolov commented 1 month ago

$random breaks reproducibility:

Quote from the style guide: "$random and $dist_*: these functions should not be used as they are not part of the SystemVerilog random stability model and may break simulation reproducibility. Use $urandom or randomize() instead."