chipsalliance / verible

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
https://chipsalliance.github.io/verible/
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Automatically generate and publish API documentation #279

Open mithro opened 4 years ago

mithro commented 4 years ago

Verilog should publish documentation on ReadTheDocs like all good packages.

See https://docs.readthedocs.io/en/stable/ on how to get started.

The docs should be published at https://verible.readthedocs.io/

mithro commented 4 years ago

@rw1nkler and @mgielda from @antmicro might also be able to give some tips and hints. @daniellimws might also be interested in helping out here. He has been doing some great work for other SymbiFlow related projects.

mithro commented 4 years ago

The idea at https://github.com/SymbiFlow/ideas/issues/49 could help with making this nice and easy.

fangism commented 4 years ago

At this phase there isn't a formal API yet, nor any commitment to keep certain library interfaces stable. Current focus is on a few end-point tools.