search

chipsalliance / yosys-f4pga-plugins

Plugins for Yosys developed as part of the F4PGA project.
https://f4pga.org
Apache License 2.0
81 stars 46 forks source link

systemverilog-plugin: fix calculate parameter value that requires extended simplify #471

Closed kamilrakoczy closed 1 year ago

kamilrakoczy commented 1 year ago

This PR fixes calculation of parameter value that uses custom (limited to plugin) simplification step.

UHDM-integration-tests: https://github.com/chipsalliance/UHDM-integration-tests/pull/715 yosys-systemverilog run: https://github.com/antmicro/yosys-systemverilog/actions/runs/4488207484

kamilrakoczy commented 1 year ago

New yosys-systemverilog run: https://github.com/antmicro/yosys-systemverilog/actions/runs/4531776808