chiragsakhuja
commented
8 years ago Sorry for the delay. When I was working on this project, I used the Synopsys SAED 90nm library provided by my university. The AND2X4, etc. parts are in that library, which is why you got the errors. I've added a parts.v file that models the parts in RTL (with no timing information) and updated the Makefile. Running make and then make test results in all tests passing for me now. You may need to use a newer version of iverilog though. I am currently on v10_0 (stable) and have not run into any issues.
Mecrisp
Thank you a lot for the Dadda-Multiplier-Generator, but I am running into difficulties when trying to build it. I am using Debian Jessie with the included Icarus Verilog version 0.9.7.
When typing "make" in the fresh package, I get errors of missing gates:
counters.v:11: error: Unknown module type: OR2X4 counters.v:12: error: Unknown module type: AND2X4 counters.v:13: error: Unknown module type: INVX4 counters.v:14: error: Unknown module type: AND2X4 counters.v:29: error: Unknown module type: OR2X4
I tried to replace by defining them myself as:
module AND2X4(a, b, c); input wire a; input wire b; output wire c;
assign c = a & b; endmodule
module OR2X4(a, b, c); input wire a; input wire b; output wire c;
assign c = a | b; endmodule
module INVX4(a, c); input wire a; output wire c;
assign c = ~a; endmodule
With this addition to counter.v, make is fine. Unfortunately, make test fails:
make test iverilog -o counters_tb -Wall counters.v counters_tb.v
./counters_tb
Testing 3:2
internal error: 15vvp_fun_part_pv: recv_vec4_pv(1'bX, 0, 1, 2) not implemented
vvp: vvp_net.cc:2464: virtual void vvp_net_fun_t::recv_vec4_pv(vvp_net_ptr_t, const vvp_vector4_t&, unsigned int, unsigned int, unsigned int, vvp_context_t): Assertion `0' failed.
Makefile:8: recipe for target 'test-counters' failed
make: *\ [test-counters] Abgebrochen
I wish to insert your multiplier into Mecrisp-Ice (see mecrisp.sourceforge.net), which is synthesized with Yosys for Lattice iCE40, and using the same replacement gates, I get a whole bunch of errors of this type:
Warning: multiple conflicting drivers for top._j1.multiplier.c1_10_4.rca2.two.gate2.a: port Y[0] of cell $techmap_j1.multiplier.c1_10_4.rca2.gate0.$or$icestorm/daddagates.v:11$162 ($or) port Y[0] of cell $techmap_j1.multiplier.c1_10_4.rca2.two.gate1.$and$icestorm/daddagates.v:5$161 ($and) Warning: multiple conflicting drivers for top._j1.multiplier.c1_10_4.rca1.two.gate2.a: port Y[0] of cell $techmap_j1.multiplier.c1_10_4.rca1.gate0.$or$icestorm/daddagates.v:11$162 ($or) port Y[0] of cell $techmap_j1.multiplier.c1_10_4.rca1.two.gate1.$and$icestorm/daddagates.v:5$161 ($and) Warning: multiple conflicting drivers for top._j1.multiplier.c1_10_4.fa2.two.gate2.a: port Y[0] of cell $techmap_j1.multiplier.c1_10_4.fa2.gate0.$or$icestorm/daddagates.v:11$162 ($or) port Y[0] of cell $techmap_j1.multiplier.c1_10_4.fa2.two.gate1.$and$icestorm/daddagates.v:5$161 ($and) Warning: multiple conflicting drivers for top._j1.multiplier.c1_10_4.fa1.two.gate2.a: port Y[0] of cell $techmap_j1.multiplier.c1_10_4.fa1.gate0.$or$icestorm/daddagates.v:11$162 ($or) port Y[0] of cell $techmap_j1.multiplier.c1_10_4.fa1.two.gate1.$and$icestorm/daddagates.v:5$161 ($and) Warning: Wire top._j1.multiplier.c2_9_0.rca2.gate0.b is used but has no driver. Warning: Wire top._j1.multiplier.c2_9_0.rca1.gate0.b is used but has no driver. Warning: Wire top._j1.multiplier.c2_9_0.fa2.gate0.b is used but has no driver. Warning: Wire top._j1.multiplier.c2_9_0.fa1.gate0.b is used but has no driver. Warning: Wire top._j1.multiplier.c2_8_0.rca2.gate0.b is used but has no driver. Warning: Wire top._j1.multiplier.c2_8_0.rca1.gate0.b is used but has no driver. Warning: Wire top._j1.multiplier.c2_8_0.fa2.gate0.b is used but has no driver. Warning: Wire top._j1.multiplier.c2_8_0.fa1.gate0.b is used but has no driver.
I am not sure what went wrong.
Best wishes from Germany, Matthias