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chochain / eForthChip

Forth on FPGA for AI & Robotics
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fpga7 #1

Open arblake opened 2 years ago

arblake commented 2 years ago

Is this for a specific fpga?... I wish to take an existing forth on an fpga and extend it.

chochain commented 2 years ago

Hi Adrian,

This project is an attempt to adapt my friend, who passed early this year, Dr. Ting's original VHDL Forth eJ32 (in ~/orig directory) in SystemVerilog. It is functional on simulator for Lattice iCE40UP but not validated on timing or any physical chip yet. I'm a software engineer and this is my first FPGA project. So, don't take it too seriously. However, on FPGA Forth, have chat with Don and Dimitri here https://www.facebook.com/groups/1304548976637542 or google J1 Forth Chip can give you some insight. Best,

arblake commented 2 years ago

Hi, I to also knew Dr Ting having visited him on 2 occasions. I simply wish to extend forth with a personal idea. I have looked at what you have done and I think I can use it. I to am a novice at System Verilog, but will try. I would like to keep in contact with you as I proceed.

Adrian

On Mon, Oct 31, 2022, 17:55 chochain @.***> wrote:

Hi Adrian,

This project is an attempt to adapt my friend, who passed early this year, Dr. Ting's original VHDL Forth eJ32 (in ~/orig directory) in SystemVerilog. It is functional on simulator for Lattice iCE40UP but not validated on timing or any physical chip yet. I'm a software engineer and this is my first FPGA project. So, don't take it too seriously. However, on FPGA Forth, have chat with Don and Dimitri here https://www.facebook.com/groups/1304548976637542 or google J1 Forth Chip can give you some insight. Best,

— Reply to this email directly, view it on GitHub https://github.com/chochain/forthsuper/issues/1#issuecomment-1297305110, or unsubscribe https://github.com/notifications/unsubscribe-auth/AABNKKWOQQWPXT723LRGLZDWF7TW7ANCNFSM6AAAAAARTFRD7Y . You are receiving this because you authored the thread.Message ID: @.***>

chochain commented 2 years ago

Adrian, Glad to hear that you've known Dr. Ting as well. It was an honor working closely with him in his last year completing things he enjoyed. Feel free to use and alter any of the code from my repositories that fit your need. Do not hesitate to let me know should you need any support. Good luck, Lee

arblake commented 2 years ago

Lee, Now I am back at my home from travelling in Georgia, the country. What software did you use to develop and test your FPGA design? Adrian

On Tue, Nov 1, 2022 at 7:37 PM chochain @.***> wrote:

Adrian, Glad to hear that you've known Dr. Ting as well. It was an honor working closely with him in his last year completing things he enjoyed. Feel free to use and alter any of the code from my repositories that fit your need. Do not hesitate to let me know should you need any support. Good luck, Lee

— Reply to this email directly, view it on GitHub https://github.com/chochain/forthsuper/issues/1#issuecomment-1298879326, or unsubscribe https://github.com/notifications/unsubscribe-auth/AABNKKSJ523ZRIUOHHMJE63WGFIL5ANCNFSM6AAAAAARTFRD7Y . You are receiving this because you authored the thread.Message ID: @.***>

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chochain commented 2 years ago

Lattice Radiant 3.0 for ICE40 was used which can be downloaded from https://www.latticesemi.com/LatticeRadiant?pr031521 It comes with a copy of ModelSim. A free license key can be have following its licensing link. Good luck.