No operation of sign extension is done on f_n . That is f_n will be truncated to i8 that is 8 bit but will not be undergo a sign extension operation to i32 . It is to be noted that this kind of operation happens only when the variable is in lower bit order and needs to be converted to higher bit order.
LLVM IR :
Command used : guile ../../../../utils/sexp-json.scm < int_to_i8_to_int.sexp | python ../../../../brilisp.py | python ../../../../llvm.py |
The below brilisp code can be used for regression test. Brilisp code :
Whats the issue ? So when the below line of code is present
No operation of sign extension is done on f_n . That is f_n will be truncated to i8 that is 8 bit but will not be undergo a sign extension operation to i32 . It is to be noted that this kind of operation happens only when the variable is in lower bit order and needs to be converted to higher bit order.
LLVM IR : Command used :
guile ../../../../utils/sexp-json.scm < int_to_i8_to_int.sexp | python ../../../../brilisp.py | python ../../../../llvm.py |
But instead of using
use the below :
the code works properly. The llvm IR now contains the statements sext and. the output is as expected.