Closed Doctor-James closed 1 year ago
The name "pulpino_top" and "module " are actually unexpected in this array, they are removed from the upload today (2023/3/11), thank you for pointing it out.
node_attr is the feature extracted from netlist to construct graph, and there is a page about its characteristics https://circuitnet.github.io/feature/graph.html. Nodes with same module name doesn't mean they are connected. Nodes are connected when they belong to the same net.
For the netlist itself, checkout the flatten_netlist.tar.gz or hier_netlist.tar.gz.
flatten_netlist.tar.gz or hier_netlist.tar.gz. The file inside was a verilog file, and it was so complicated that I was confused. Is there an easy way or script to get information about connections between nodes? (used as input to GNN). Thank you for your patience
ok, what you need is just the attributes (pin_attr, node_attr, net_attr)
The pin_attr is 3D, containing all pin names, pin to net mapping, which is an index to the net_attr array indicating which net the pin belongs to, and pin to node mapping, similar to the one for the net. You can build an adjacency matrix by traversal in the pin_attr. For example, you can take the node as vertex. Then, you can find all the pins in a net by traversal, and you know which node these pins belong to, so these nodes are connected by a net.
非常抱歉打扰您一下,就是存在pin 属于一个list net的情况如何处理,例如:['RTSEL' list([41231, 41231]) 39721]
非常抱歉打扰您一下,就是存在pin 属于一个list net的情况如何处理,例如:['RTSEL' list([41231, 41231]) 39721]
你好,我们收到了你的邮件,关于一个pin属于多个net的情况是很正常的,你可以以同一个net为主体,然后去找他包含的所有pin,从而找到包含的所有node,另外,我们的circuitformer由于是类似点云的,所以不需要关注各个node之间的拓扑链接情况,只需要关注几何位置
您好,冒昧打扰您一下。请问是相当于把这个list拆开处理吗?把list里的net 逐个取出来进而根据您提供的建议“以同一个net为主体,然后去找他包含的所有pin,从而找到包含的所有node”。
冒昧的问一下您,请问是否需要考虑edge的权重?比如之前的数据中,39721这个node和41231这个net连接了两次。
如果是下面这么个复杂的情况,同一个net连接了和node 连接了32次。
-----原始邮件----- 发件人:Doctor-James @.> 发送时间:2024-10-30 13:35:51 (星期三) 收件人: circuitnet/CircuitNet @.> 抄送: xiaoqiang88888 @.>, Comment @.> 主题: Re: [circuitnet/CircuitNet] Problems with Gate-level Netlist (Issue #14)
非常抱歉打扰您一下,就是存在pin 属于一个list net的情况如何处理,例如:['RTSEL' list([41231, 41231]) 39721]
你好,我们收到了你的邮件,关于一个pin属于多个net的情况是很正常的,你可以以同一个net为主体,然后去找他包含的所有pin,从而找到包含的所有node,另外,我们的circuitformer由于是类似点云的,所以不需要关注各个node之间的拓扑链接情况,只需要关注几何位置
— Reply to this email directly, view it on GitHub, or unsubscribe. You are receiving this because you commented.Message ID: @.***>
您好,冒昧打扰您一下。请问是相当于把这个list拆开处理吗?把list里的net 逐个取出来进而根据您提供的建议“以同一个net为主体,然后去找他包含的所有pin,从而找到包含的所有node”。
冒昧的问一下您,请问是否需要考虑edge的权重?比如之前的数据中,39721这个node和41231这个net连接了两次。
如果是下面这么个复杂的情况,同一个net连接了和node 连接了32次。
老师,您好,顺便再补充一个问题,如果如果遍历出来的某个net里只有一个node节点,是不是可以忽略呢,
-----原始邮件----- 发件人:Doctor-James @.> 发送时间:2024-10-30 13:35:51 (星期三) 收件人: circuitnet/CircuitNet @.> 抄送: xiaoqiang88888 @.>, Comment @.> 主题: Re: [circuitnet/CircuitNet] Problems with Gate-level Netlist (Issue #14)
非常抱歉打扰您一下,就是存在pin 属于一个list net的情况如何处理,例如:['RTSEL' list([41231, 41231]) 39721]
你好,我们收到了你的邮件,关于一个pin属于多个net的情况是很正常的,你可以以同一个net为主体,然后去找他包含的所有pin,从而找到包含的所有node,另外,我们的circuitformer由于是类似点云的,所以不需要关注各个node之间的拓扑链接情况,只需要关注几何位置
— Reply to this email directly, view it on GitHub, or unsubscribe. You are receiving this because you commented.Message ID: @.***>
I'd like to ask some questions about Gate-level Netlist,I looked at the contents of node_attr,it's a two-dimensional array,The first dimension starts with "pulpino_top", followed by some node names,the second dimension starts with "module", followed by some module names. Does that mean nodes which have the same module name are connected to each other?